Senior Manager – ASIC STA & CAD Engineering

We’re Hiring: Senior Manager – ASIC STA & CAD Engineering 🚀
📍 Location: Markham, ON (Onsite)

Are you an expert in ASIC timing analysis, CAD methodologies, and have experience in closing high-performance designs? We’re looking for a highly skilled Senior Manager to join our dynamic team!

🔑 Key Responsibilities:
# Develop block and SoC timing constraints and signoff multi-corner, multi-voltage designs.
# Own the timing flow execution to meet SoC timing requirements, including timing budgeting, repeater planning, and constraints management.
# Collaborate with block and SoC design teams to ensure design requirements and STA constraints are met.
# Work with physical implementation teams to ensure designs meet QoR and debug timing failures.

🧠 Preferred Experience:
# 10+ years in ASIC implementation and CAD methodology.
# Expertise in ASIC STA constraints generation, timing analysis, timing convergence, and ECOs.
# Experience with multi-voltage and low-power designs is a plus.
# Proficiency in industry-standard ASIC EDA tools, including Synopsys DC and Primetime.

# Strong scripting skills in TCL, Perl, or Python.
# Hands-on experience with physical design implementation is an advantage.
# Strong communication and analytical skills to work across multiple projects with globally distributed teams.