Engineering Lead

🚀 We’re Hiring: Engineering Lead
📍 Location: Markham, Ontario or Vancouver, British Columbia (Hybrid)
🕒 Full-Time | Hybrid Work Model

Job Description-
Key Responsibilities:
# IOHUB Subsystem test plan creation, DRVR implementation and verification closure.
# Closely work with Design/Architecture team to develop new verification components in the Testbench.
# Support SoC to complete IOHUB IPs interoperability testing with external IPs at system level.
# Attend conference call for status sync up with global team.

Preferred Experience:
# Global company working experience background, fluent oral English
# Complex IP/ASIC/SOC Design Verification, direct experience in IP/SOC or Processor (CPU or GPU) or Industry bus standard (PCI-e, HT) is preferred.
# Good knowledge of UVM/Verilog/System C/System Verilog.
# Solid background with hardware verification methodologies such as coverage-based verification methodology with the use of hardware assertions (PSL or SVA), insights into random techniques.
# Knowledge of Fabric and Virtualization is an asset.
# Scripting languages (Perl, C Shell, Makefile, …) experience.

Academic Credentials:
# MSEE within 3+ years, or BSEE within 5+ years’ experience in digital
# ASIC/SOC design verification.

If you are Interested please share your resume on madhuri.rane@techdoquest.com